8051 interview Questions for Beginners
1.
A micro
controller at-least should consist of:
a) RAM, ROM, I/O devices, serial and parallel ports and timers
b) CPU, RAM, I/O devices, serial and parallel ports and timers
c) CPU,RAM, ROM, I/O devices, serial and parallel ports and timers
d) CPU, ROM, I/O devices and timers
a) RAM, ROM, I/O devices, serial and parallel ports and timers
b) CPU, RAM, I/O devices, serial and parallel ports and timers
c) CPU,RAM, ROM, I/O devices, serial and parallel ports and timers
d) CPU, ROM, I/O devices and timers
2. Unlike
micro processors, micro controllers make use of batteries because they have:
a) high power dissipation
b) low power consumption
c) low voltage consumption
d) low current consumption
a) high power dissipation
b) low power consumption
c) low voltage consumption
d) low current consumption
3. What is the order decided by a processor or
the CPU of a controller to execute an instruction?
a) decode,fetch,execute
b) execute,fetch,decode
c) fetch,execute,decode
d) fetch,decode,execute
a) decode,fetch,execute
b) execute,fetch,decode
c) fetch,execute,decode
d) fetch,decode,execute
4. How are micro controllers classified on the
basic of internal bus width?
a) 8,16,32,64 bits
b) 4,8,16,32 bits
c) 8,16 bits
d) 4,16,32 bits
a) 8,16,32,64 bits
b) 4,8,16,32 bits
c) 8,16 bits
d) 4,16,32 bits
5. How is the performance and the computer
capability affected by increasing its internal bus width?
a) it increases and turns better
b) it decreases
c) remains the same
d) internal bus width don’t affect the performance in any way
a) it increases and turns better
b) it decreases
c) remains the same
d) internal bus width don’t affect the performance in any way
6. Abbreviate CISC and RISC.
a) Complete Instruction Set Computer, Reduced Instruction Set Computer
b) Complex Instruction Set Computer, Reduced Instruction Set Computer
c) Complex Instruction Set Computer, Reliable Instruction Set Computer
d) Complete Instruction Set Computer, Reliable Instruction Set Computer
a) Complete Instruction Set Computer, Reduced Instruction Set Computer
b) Complex Instruction Set Computer, Reduced Instruction Set Computer
c) Complex Instruction Set Computer, Reliable Instruction Set Computer
d) Complete Instruction Set Computer, Reliable Instruction Set Computer
7. Give the names of the buses present in a
controller for transferring data from one place to another?
a) data bus, address bus
b) data bus
c) data bus, address bus, control bus
d) address bus
a) data bus, address bus
b) data bus
c) data bus, address bus, control bus
d) address bus
8. What is the file extension that is loaded in
a micro controller for executing any instruction?
a) .doc
b) .c
c) .txt
d) .hex
a) .doc
b) .c
c) .txt
d) .hex
9. What are the most appropriate criterion for
choosing the right micro controller of our choice?
a) speed
b) availability
c) ease with the product
d) all of the mentioned
a) speed
b) availability
c) ease with the product
d) all of the mentioned
10. Why micro controllers are not called general
purpose devices?
a) because they are based on VLSI technology
b) because they are not meant to do a single work at a time
c) because they are cheap
d) because they consume low power
a) because they are based on VLSI technology
b) because they are not meant to do a single work at a time
c) because they are cheap
d) because they consume low power
11. How many types of architectures are
available, for designing a device that is able to work on its own?
a) 3
b) 2
c) 1
d) 4
a) 3
b) 2
c) 1
d) 4
12. Which architecture is followed by general
purpose microprocessors?
a) Harvard architecture
b) Von Neumann architecture
c) none of the mentioned
d) all of the mentioned
a) Harvard architecture
b) Von Neumann architecture
c) none of the mentioned
d) all of the mentioned
13. Which architecture involves both the volatile
and the non volatile memory?
a) Harvard architecture
b) Von Neumann architecture
c) none of the mentioned
d) all of the mentioned
a) Harvard architecture
b) Von Neumann architecture
c) none of the mentioned
d) all of the mentioned
14. Which architecture provides separate buses
for program and data memory?
a) Harvard architecture
b) Von Neumann architecture
c) none of the mentioned
d) all of the mentioned
a) Harvard architecture
b) Von Neumann architecture
c) none of the mentioned
d) all of the mentioned
15. Which micro controller don’t match with its
architecture below?
a) Microchip PIC- Harvard
b) MSP430- Harvard
c) ARM7- Von Neumann
d) ARM9- Harvard
a) Microchip PIC- Harvard
b) MSP430- Harvard
c) ARM7- Von Neumann
d) ARM9- Harvard
16. Harvard architecture allows:
a) separate program and data memory
b) pipe-ling
c) complex architecture
d) all of the mentioned
a) separate program and data memory
b) pipe-ling
c) complex architecture
d) all of the mentioned
17. Which out of the following supports Harvard
architecture?
a) ARM7
b) Pentium
c) SHARC
d) all of the mentioned
a) ARM7
b) Pentium
c) SHARC
d) all of the mentioned
18. Why most of the DSPs use Harvard
architecture?
a) they provide greater bandwidth
b) they provide more predictable bandwidth
c) none of the mentioned
d) both of the mentioned
a) they provide greater bandwidth
b) they provide more predictable bandwidth
c) none of the mentioned
d) both of the mentioned
19. Which of the following supports CISC as well
as Harvard architecture?
a) ARM7
b) ARM9
c) SHARC
d) none of the mentioned
a) ARM7
b) ARM9
c) SHARC
d) none of the mentioned
20. n Neumann
c) none of the mentioned
d) both of the mentioned
c) none of the mentioned
d) both of the mentioned
21. . 8051 series of micro controllers are made
by which of the following companies?
a) Atmel
b) Philips
c) none of the mentioned
d) both of the mentioned
a) Atmel
b) Philips
c) none of the mentioned
d) both of the mentioned
22. AT89C2051 has RAM of:
a) 128 bytes
b) 256 bytes
c) 64 bytes
d) 512 bytes
a) 128 bytes
b) 256 bytes
c) 64 bytes
d) 512 bytes
23. 8051 series has how many 16 bit registers?
a) 2
b) 3
c) 1
d) 0
a) 2
b) 3
c) 1
d) 0
24. When 8051 wakes up then 0x00 is loaded to
which register?
a) DPTR
b) SP
c) PC
d) PSW
a) DPTR
b) SP
c) PC
d) PSW
25. When the micro controller executes some
arithmetic operations, then the flag bits of which register are affected?
a) PSW
b) SP
c) DPTR
d) PC
a) PSW
b) SP
c) DPTR
d) PC
26. How is the status of the carry, auxiliary
carry and parity flag affected if write instruction
MOV A,#9C
ADD A,#64H
a) CY=0,AC=0,P=0
b) CY=1,AC=1,P=0
c) CY=0,AC=1,P=0
d) CY=1,AC=1,P=1
MOV A,#9C
ADD A,#64H
a) CY=0,AC=0,P=0
b) CY=1,AC=1,P=0
c) CY=0,AC=1,P=0
d) CY=1,AC=1,P=1
27. How are the bits of the register PSW affected
if we select Bank2 of 8051?
a) PSW.5=0 and PSW.4=1
b) PSW.2=0 and PSW.3=1
c) PSW.3=1 and PSW.4=1
d) PSW.3=0 and PSW.4=1
a) PSW.5=0 and PSW.4=1
b) PSW.2=0 and PSW.3=1
c) PSW.3=1 and PSW.4=1
d) PSW.3=0 and PSW.4=1
28. If we push data onto the stack then the stack
pointer
a) increases with every push
b) decreases with every push
c) none of the mentioned
d) both of the mentioned
a) increases with every push
b) decreases with every push
c) none of the mentioned
d) both of the mentioned
29. On power up, the 8051 uses which RAM
locations for register R0- R7
a) 00-2F
b) 00-07
c) 00-7F
d) 00-0F
a) 00-2F
b) 00-07
c) 00-7F
d) 00-0F
30. How many bytes of bit addressable memory is
present in 8051 based micro controllers?
a) 8 bytes
b) 32 bytes
c) 16 bytes
d) 128 bytes
a) 8 bytes
b) 32 bytes
c) 16 bytes
d) 128 bytes
31. DJNZ R0,label is how many bit instruction?
a) 2
b) 3
c) 1
d) Cant be determined
a) 2
b) 3
c) 1
d) Cant be determined
32. JZ, JNZ, DJNZ, JC, JNC instructions monitor
the bits of which register ?
a) DPTR
b) B
c) A
d) PSW
a) DPTR
b) B
c) A
d) PSW
33.
Calculate the
jump code for again and here if code starts at 0000H
MOV R1,#0
MOV A,#0
MOV R0,#25H
AGAIN:ADD A,#0ECH
JNC HERE
HERE: INC R1
DJNZ R0,AGAIN
MOV R0,A
END
a)F3,02
b)F9,01
c)E9,01
d)E3,02
b)F9,01
c)E9,01
d)E3,02
34. When the call instruction is executed the top
most element of stack comes out to be
a) the address where stack pointer starts
b) the address next to the call instruction
c) address of the call instruction
d) next address of the stack pointer
a) the address where stack pointer starts
b) the address next to the call instruction
c) address of the call instruction
d) next address of the stack pointer
35. LCALL instruction takes
a) 2 bytes
b) 4 bytes
c) 3 bytes
d) 1 byte
a) 2 bytes
b) 4 bytes
c) 3 bytes
d) 1 byte
36. Are PUSH and POP instructions are a type of
CALL instructions?
a) yes
b) no
c) none of the mentioned
d) cant be determined
a) yes
b) no
c) none of the mentioned
d) cant be determined
37. What is the time taken by one machine cycle
if crystal frequency is 20MHz?
a) 1.085 micro seconds
b) 0.60 micro seconds
c) 0.75 micro seconds
d) 1 micro seconds
a) 1.085 micro seconds
b) 0.60 micro seconds
c) 0.75 micro seconds
d) 1 micro seconds
38. Find the number of times the following loop will be
executed
MOV R6,#200
BACK:MOV R5,#100
HERE:DJNZ R5, HERE
DJNZ R6,BACK
END
a)100
b)200
c)20000
d)200000
b)200
c)20000
d)200000
39.
What
is the meaning of the instruction MOV A,05H ?
a) data 05H is stored in the accumulator
b) Fifth bit of accumulator is set to one
c) address 05H is stored in the accumulator
d) None of the mentioned
a) data 05H is stored in the accumulator
b) Fifth bit of accumulator is set to one
c) address 05H is stored in the accumulator
d) None of the mentioned
40. Does the two instructions mean the same?
1) BACK: DEC R0
JZ BACK
2) BACK: DJNZ RO, BACK
a)yes
b)no
c)cant be determined
d) yes and second one is preferred
b)no
c)cant be determined
d) yes and second one is preferred
41. To initialise any port as an output port what value is to be given
to it?
a) 0xFF
b) 0x00
c) 0x01
d) A port is by default an output port
a) 0xFF
b) 0x00
c) 0x01
d) A port is by default an output port
42.Which out of the four ports of 8051 needs a pull-up resistor for
using it is as an input or an output port?
a) PORT 0
b) PORT 1
c) PORT 2
d) PORT 3
a) PORT 0
b) PORT 1
c) PORT 2
d) PORT 3
43. Which of the ports act as the 16 bit address lines for
transferring data through it?
a) PORT 0 and PORT 1
b) PORT 1 and PORT 2
c) PORT 0 and PORT 2
d) PORT 1 and PORT 3
a) PORT 0 and PORT 1
b) PORT 1 and PORT 2
c) PORT 0 and PORT 2
d) PORT 1 and PORT 3
44.Which of the following registers are not bit addressable?
a) SCON
b) PCON
c) A
d) PSW
a) SCON
b) PCON
c) A
d) PSW
45.Which instruction is used to check the status of a single bit?
a) MOV A,P0
b) ADD A,#05H
c) JNB PO.0, label
d) CLR P0.05H
a) MOV A,P0
b) ADD A,#05H
c) JNB PO.0, label
d) CLR P0.05H
46. Which addressing mode is used in pushing or popping any element on
or from the stack?
a) immediate
b) direct
c) indirect
d) register
a) immediate
b) direct
c) indirect
d) register
47. Which operator is the most important while assigning any instruction
as register indirect instruction?
a) $
b) #
c) @
d) &
a) $
b) #
c) @
d) &
48. What is the advantage of register indirect addressing mode?
a) it makes use of registers R0 and R1
b) it uses the data dynamically
c) it makes use of operator @
d) it is easy
a) it makes use of registers R0 and R1
b) it uses the data dynamically
c) it makes use of operator @
d) it is easy
49. Which of the following comes under indexed addressing mode?
a) MOVX A, @DPTR
b) MOVC @A+DPTR,A
c) MOV A,R0
d) MOV @R0,A
a) MOVX A, @DPTR
b) MOVC @A+DPTR,A
c) MOV A,R0
d) MOV @R0,A
50. Is
this a valid statement ?
SETB A
a) yes
b) no
c) cant be determined
d) none of the mentioned
SETB A
a) yes
b) no
c) cant be determined
d) none of the mentioned
51. When we add two numbers the destination address must always
be.
a) some immediate data
b) any register
c) accumulator
d) memory
a) some immediate data
b) any register
c) accumulator
d) memory
52. DAA command adds 6 to the nibble if:
a) CY and AC are necessarily 1
b) either CY or AC is 1
c) no relation with CY or AC
d) CY is 1
a) CY and AC are necessarily 1
b) either CY or AC is 1
c) no relation with CY or AC
d) CY is 1
53. If SUBB
A,R4 is executed, then actually what operation is being applied?
a) R4+A
b) R4-A
c) A-R4
d) R4+A
a) R4+A
b) R4-A
c) A-R4
d) R4+A
54. A valid division instruction always
makes:
a) CY=0,AC=1
b) CY=1,AC=1
c) CY=0,AC=0
d) no relation with AC and CY
a) CY=0,AC=1
b) CY=1,AC=1
c) CY=0,AC=0
d) no relation with AC and CY
55. n 8 bit
signed number operations, OV flag is set to 1 if:
a) a carry is generated from D7 bit
b) a carry is generated from D3 bit
c) a carry is generated from D7 or D3 bit
d) a carry is generated from D7 or D6 bit
a) a carry is generated from D7 bit
b) a carry is generated from D3 bit
c) a carry is generated from D7 or D3 bit
d) a carry is generated from D7 or D6 bit
56. In unsigned number addition, status of
which bit is important?
a) OV
b) CY
c) AC
d) PSW
a) OV
b) CY
c) AC
d) PSW
57. Which
instructions have no affect on the flags of PSW.
a) ANL
b) ORL
c) XRL
d) all of the mentioned
a) ANL
b) ORL
c) XRL
d) all of the mentioned
58. ANL
instruction is used
a) to AND the contents of the two registers
b) to mask the status of the bits
c) all of the mentioned
d) none of the mentioned
a) to AND the contents of the two registers
b) to mask the status of the bits
c) all of the mentioned
d) none of the mentioned
59. CJNE instruction makes
a) the pointer to jump if the values of the destination and the source address are equal
b) sets CY=1, if the contents of destination register is greater then that of the source register
c) sets CY=0, if the contents of destination register is smaller then that of the source register
d) none of the mentioned
a) the pointer to jump if the values of the destination and the source address are equal
b) sets CY=1, if the contents of destination register is greater then that of the source register
c) sets CY=0, if the contents of destination register is smaller then that of the source register
d) none of the mentioned
60. XRL, ORL, ANL commands have
a) accumulator as the destination address and any register, memory or any immediate data as the source address
b) accumulator as the destination address and any immediate data as the source address
c) any register as the destination address and accumulator, memory or any immediate data as the source address
d) any register as the destination address and any immediate data as the source address
a) accumulator as the destination address and any register, memory or any immediate data as the source address
b) accumulator as the destination address and any immediate data as the source address
c) any register as the destination address and accumulator, memory or any immediate data as the source address
d) any register as the destination address and any immediate data as the source address
61. What is
the clock source for the timers?
a) some external crystal applied to the micro-controller for executing the timer
b) from the crystal applied to the micro-controller
c) through the software
d) through programming
a) some external crystal applied to the micro-controller for executing the timer
b) from the crystal applied to the micro-controller
c) through the software
d) through programming
62. What is
the frequency of the clock that is being used as the clock source for the
timer?
a) some externally applied frequency f’
b) controller’s crystal frequency f
c) controller’s crystal frequency /12
d) externally applied frequency/12
a) some externally applied frequency f’
b) controller’s crystal frequency f
c) controller’s crystal frequency /12
d) externally applied frequency/12
63. What is
the function of the TMOD register?
a) TMOD register is used to set different timer’s or counter’s to their appropriate modes
b) TMOD register is used to load the count of the timer.
c) Is the destination or the final register where the result is obtained after the operation of the timer
d) Is used to interrupt the timer
a) TMOD register is used to set different timer’s or counter’s to their appropriate modes
b) TMOD register is used to load the count of the timer.
c) Is the destination or the final register where the result is obtained after the operation of the timer
d) Is used to interrupt the timer
64. What is
the maximum delay that can be generated with the crystal frequency of 22MHz?
a) 2978.9 sec
b) 0.011 msec
c) 11.63 sec
d) 2.97 msec
a) 2978.9 sec
b) 0.011 msec
c) 11.63 sec
d) 2.97 msec
65. Auto
reload mode is allowed in which mode of the timer?
a) Mode 0
b) Mode 1
c) Mode 2
d) Mode 3
a) Mode 0
b) Mode 1
c) Mode 2
d) Mode 3
66. Find out the roll over value for the
timer in Mode 0, Mode 1 and Mode 2?
a) 00FFH,0FFFH,FFFFH
b) 1FFFH,0FFFH,FFFFH
c) 1FFFH,FFFFH,00FFH
d) 1FFFH,00FFH,FFFFH
a) 00FFH,0FFFH,FFFFH
b) 1FFFH,0FFFH,FFFFH
c) 1FFFH,FFFFH,00FFH
d) 1FFFH,00FFH,FFFFH
67. What
steps are followed when we need to turn on any timer?
a) load the count, start the timer, keep monitoring it, stop the timer
b) load the TMOD register, load the count, start the timer, keep monitoring it, stop the timer
c) load the TMOD register, start the timer,load the count, keep monitoring it, stop the timer
d) none of the mentioned
a) load the count, start the timer, keep monitoring it, stop the timer
b) load the TMOD register, load the count, start the timer, keep monitoring it, stop the timer
c) load the TMOD register, start the timer,load the count, keep monitoring it, stop the timer
d) none of the mentioned
68. If Timer 0 is to be used as a counter,
then at what particular pin clock pulse need to be applied?
a) P3.3
b) P3.4
c) P3.5
d) P3.6
a) P3.3
b) P3.4
c) P3.5
d) P3.6
69. In the
instruction “MOV TH1,#-3”, what is the value that is being loaded in the TH1
register ?
a) 0xFCH
b) 0xFBH
c) 0xFDH
d) 0xFEH
a) 0xFCH
b) 0xFBH
c) 0xFDH
d) 0xFEH
70. TF1,
TR1, TF0, TR0 bits are of which register?
a) TMOD
b) SCON
c) TCON
d) SMOD
a) TMOD
b) SCON
c) TCON
d) SMOD
71. What is the difference between UART
and USART communication?
a) they are the names of the same particular thing, just the difference of A and S is there in it
b) one uses asynchronous means of communication and the other uses synchronous means of communication
c) one uses asynchronous means of communication and the other uses asynchronous and synchronous means of communication
d) one uses angular means of the communication and the other uses linear means of communication
a) they are the names of the same particular thing, just the difference of A and S is there in it
b) one uses asynchronous means of communication and the other uses synchronous means of communication
c) one uses asynchronous means of communication and the other uses asynchronous and synchronous means of communication
d) one uses angular means of the communication and the other uses linear means of communication
72. Which of
the following best describes the use of framing in asynchronous means of
communication?
a) it binds the data properly
b) it tells us about the start and stop of the data to be transmitted or received
c) it is used for error checking
d) it is used for flow control
a) it binds the data properly
b) it tells us about the start and stop of the data to be transmitted or received
c) it is used for error checking
d) it is used for flow control
73. Which of
the following signal control the flow of data?
a) RTS
b) DTR
c) both of the mentioned
d) none of the mentioned
a) RTS
b) DTR
c) both of the mentioned
d) none of the mentioned
74. Which of
the following is the logic level understood by the
micro-controller/micro-processor?
a) TTL logic level
b) RS232 logic level
c) none of the mentioned
d) both of the mentioned
a) TTL logic level
b) RS232 logic level
c) none of the mentioned
d) both of the mentioned
75. What is
null modem connection?
a) no data transmission
b) no MAX232
c) the RxD of one is the TxD for the other
d) no serial communication
a) no data transmission
b) no MAX232
c) the RxD of one is the TxD for the other
d) no serial communication
76. Which
devices are specifically being used for converting serial to parallel and from
parallel to serial respectively?
a) timers
b) counters
c) registers
d) serial communication
a) timers
b) counters
c) registers
d) serial communication
77. Which of
the following best states the reason that why baud rate is mentioned in serial
communication?
a) to know about the no of bits being transmitted per second
b) to make the two devices compatible with each other, so that the transmission becomes easy and error free
c) to use Timer 1
d) for wasting memory
a) to know about the no of bits being transmitted per second
b) to make the two devices compatible with each other, so that the transmission becomes easy and error free
c) to use Timer 1
d) for wasting memory
78. With
what frequency UART operates( where f denoted the crystal frequency )?
a) f/12
b) f/32
c) f/144
d) f/384
a) f/12
b) f/32
c) f/144
d) f/384
79. What is the function of SCON register?
a) to control SBUF and SMOD registers
b) to program the start bit, stop bit, and data bits of framing
c) none of the mentioned
d) both of the mentioned
a) to control SBUF and SMOD registers
b) to program the start bit, stop bit, and data bits of framing
c) none of the mentioned
d) both of the mentioned
80. What
should be done if we want to double the baud rate?
a) change a bit of the TMOD register
b) change a bit of the PCON register
c) change a bit of the SCON register
d) change a bit of the SBUF register
a) change a bit of the TMOD register
b) change a bit of the PCON register
c) change a bit of the SCON register
d) change a bit of the SBUF register
81. Which of
the following steps detects the key in a 4*4 keyboard matrix about the key that
is being pressed?
a) masking of bits
b) ensuring that initially all keys are open
c) checking that whether the key is actually pressed or not
d) all of the mentioned
a) masking of bits
b) ensuring that initially all keys are open
c) checking that whether the key is actually pressed or not
d) all of the mentioned
82. What is
described by this command: CJNE A,#00001111b, ROW1
a) it masks the bit and then jump to the label where ROW1 is written
b) it makes the value of the accumulator 0FH and then jumps at the address where ROW1 label is written
c) it compares the value of the accumulator with 0FH and jumps to the location where ROW1 label is there, if the value becomes equal
d) it compares the value of the accumulator with 0FH and jumps to the location where ROW1 label is there, if the value is not equal
a) it masks the bit and then jump to the label where ROW1 is written
b) it makes the value of the accumulator 0FH and then jumps at the address where ROW1 label is written
c) it compares the value of the accumulator with 0FH and jumps to the location where ROW1 label is there, if the value becomes equal
d) it compares the value of the accumulator with 0FH and jumps to the location where ROW1 label is there, if the value is not equal
83. To
detect that in which column, the key is placed?
a) we can mask the bits and then check it
b) we can rotate the bits and then check that particular bit which is set or reset(according to the particular condition)
c) none of the mentioned
d) both of the mentioned
a) we can mask the bits and then check it
b) we can rotate the bits and then check that particular bit which is set or reset(according to the particular condition)
c) none of the mentioned
d) both of the mentioned
84. In
reading the columns of a matrix, if no key is pressed we should get all in
binary notation
a) 0
b) 1
c) F
d) 7
a) 0
b) 1
c) F
d) 7
85. If we need to operate a key of a
keyboard in an interrupt mode, then it will generate what kind of interrupt?
a) ES
b) EX0/EX1
c) T0/T1
d) RESET
a) ES
b) EX0/EX1
c) T0/T1
d) RESET
86. To
identify that which key is being pressed, we need to:
a) ground all the pins of the port at a time.
b) ground pins of the port one at a time
c) connect all the pins of the port to the main supply at a time.
D) none of the mentioned
a) ground all the pins of the port at a time.
b) ground pins of the port one at a time
c) connect all the pins of the port to the main supply at a time.
D) none of the mentioned
87. Key press detection and Key
identification are:
a) the same processes
b) two different works done in Keyboard Interfacing
c) none of the mentioned
d) any of the mentioned
a) the same processes
b) two different works done in Keyboard Interfacing
c) none of the mentioned
d) any of the mentioned
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